1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device by using a crystaline semiconductor film. Note that the semiconductor device of the present invention includes as the categories thereof not only elements such as thin film transistors and MOS transistors, but also electronic equipment having semiconductor circuits constituted by these kinds of insulating gate type semiconductor elements, and electronic equipment such as personal computers and digital cameras, configured with an electro-optical display device (typically a liquid crystal display device) made from an active matrix substrate.
2. Description of the Related Art
Thin film transistors (TFTs) are currently known as the semiconductor elements that use a semiconductor film. TFTs are used in all types of integrated circuits, but are especially used as switching elements for matrix circuits in active matrix type liquid crystal display devices. In addition, in recent years increase of TFT mobility has been progressing, and TFTs are also used as elements in driver circuits that drive matrix circuits. In order to be used in a driver circuit, it is necessary to use a crystalline silicon film, which has a higher mobility than an amorphous silicon film, as a semiconductor layer. This crystalline silicon film is called polycrystalline silicon, polysilicon, microcrystalline silicon, etc.
Conventional methods known to form a crystalline silicon film are a method of direct deposition of a crystalline silicon film, and a method of crystallizing an amorphous silicon in which an amorphous silicon is deposited by CVD, and then heat treatment is performed at 600 to 1,100xc2x0 C. for between 20 and 48 hours. A crystalline silicon film formed by the latter method has larger crystal grains, and the characteristics of a manufactured semiconductor element are good.
If a crystalline silicon film is formed on a glass substrate by the latter method, the upper limit for the crystallization process temperature is approximately 600xc2x0 C., and a long time period is required for the crystallization process. Further, a 600xc2x0 C. temperature is close to the lowest temperature at which silicon will crystalize, and if it becomes 500xc2x0 C. or lower, it is impossible to perform crystallization in an industrially reasonable period of time.
In order to shorten the crystallization time, a quartz substrate with a high distortion point may be used, and the Air crystallization temperature may be raised to approximately 1,000xc2x0 C., but compared with a glass substrate, a quartz substrate is extremely high priced, and it is difficult to obtain a large surface area. For example, Corning 7059 glass, which is widely used in active type liquid crystal display devices, has a distortion point of 593xc2x0 C., and at a temperature of 600xc2x0 C. or greater for several hours, shrinking or bending of the substrate develops. Therefore, there is a demand to lower the temperature and shorten the period of time of the crystallization process so as to be able to use a glass substrate like Corning 7059 glass.
An excimer laser crystallization technique is one technique with which it is possible to lower the process temperature and shorten the process time. In a short time, excimer laser light can impart energy to the semiconductor film, which is equivalent to that of thermally annealing at approximately 1,000xc2x0 C., while imparting almost no thermal influence on the substrate, and a semiconductor film with good crystallinity can be formed. However, energy distribution onto the irradiation surface by an excimer laser is uneven, so that the crystallinity of the crystalline semiconductor film obtained is also uneven, and the fluctuation of elemental characteristics is also seen for every TFT.
Therefore, the applicant of the present invention discloses techniques of lowering the crystallization temperature, while employing heat treatment, in Japanese Patent Application Laid-open No. Hei 6-232059, Japanese Patent Application Laid-open No. Hei 7-321339, etc. The technique disclosed in the above-mentioned publications is a technique in which a trace amount of an element that promotes crystallization (referred to as crystallization promoting element, for convenience) is introduced as a catalyst, and a crystalline silicon film is obtained by subsequently performing heat treatment. An element selected from the groups consisting of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au, and Ge is used as the element that promotes crystallization.
In the crystallization disclosed in the above-mentioned publications, the crystallization promoting element moves (diffuses) within the amorphous silicon film due to heat treatment, and the crystallization of the amorphous silicon is promoted. Employment of the crystallization technique disclosed in the publications above enables to form crystalline silicon by heat treatment at between 450 and 600xc2x0 C. for 4 to 24 hours, and thus use of a glass substrate becomes possible.
However, there is a problem with the above published crystallization techniques in that the crystallization promoting element remains in the crystalline silicon film. This type of crystallization promoting element is one that will harm the semiconductor characteristics of the crystalline film, so that the stability and reliability of manufactured elements will be lost.
Therefore, in order to eliminate this problem, the applicant of the present invention examined methods of eliminating (gettering) the crystallization promoting element from the crystalline silicon film. One method is to perform heat treatment in an atmosphere containing a halogen element such as chlorine. With this method, the crystallization promoting element within the film is vaporized as a halide.
A second method selectively dopes phosphorous into the crystalline silicon film and then performs heat treatment. The crystallization promoting element is allowed to move to the phosphorous doped regions by performing heat treatment, and is captured in these regions.
However, it is necessary to set heat treatment temperature at 800xc2x0 C. or above to obtain a gettering effect in the first method, thereby being not capable of using a glass substrate. On the other hand, the heat temperature can be set to 600xc2x0 C. or less in the second method, but there is a drawback in that the processing time requires well over 10 hours.
An object of the present invention is to provide a method of performing the removal process of a crystallization promoting element with good efficiency, in using the crystallization promoting element removal technique of the second method stated above.
In addition, another object of the present invention is to keep a processing temperature at 600xc2x0 C. or less, thereby enabling the formation of high performance semiconductor elements on a glass substrate.
As shown in FIG. 2, the reason why it takes much period of time for removing crystallization promoting element is that a region 70 where the crystallization promoting element is to be reduced (hereinafter, referred to as a region to be gettered, for convenience) and phosphorous doped regions 71 for absorbing and capturing the elements (hereinafter, referred to as gettering regions) are separated from each other.
Therefore, if a gettering region is formed in contact with a region to be gettered, the migration distance to the region where the crystallization promoting element is to be captured, can be shortened, so that the process time for the removal of the crystallization promoting element can be shortened, and the process temperature can be lowered.
Here, the region 70 where the crystallization promoting element is to be reduced (the region to be gettered) is a region that includes the region that becomes the channel forming region, which provides the greatest influence regarding whether the semiconductor characteristics are good or poor. The switching characteristics and the mobility value change greatly in accordance with the characteristics of the channel forming region. If the crystallization promoting element remains irregularly in the channel forming region, this becomes a cause of damage to the semiconductor characteristics such as the switching characteristics and mobility, resulting in the lost of stability and reliability of the element. Therefore, the reduction of the crystallization promoting element remaining in the channel forming region is indispensable in the manufacture of stable and reliable elements.
Further, in addition to taking the region that becomes the channel forming region as the region to be gettered 70, it is desirable to include regions that become low impurity concentration regions that contact the channel forming region. The low impurity concentration regions are regions that reduce the leak current in the off state. Therefore, by reducing the crystallization promoting element which remains in the low impurity concentration regions, it is possible to obtain a stable, reliable element with respect to the reduction of the leak current.
Note that the low impurity concentration regions are high resistance regions in which the impurity concentration is less than that of the source region and the drain region. The impurity concentration is from 1016 to 1019 atoms/cm3. However, the impurity concentration in the low impurity concentration regions does not necessarily have to be less than that of the source region and the drain region, provided that the resistance in the low impurity concentration regions is higher than that of the source region and the drain region. Therefore, it is acceptable to implant ions into the low impurity concentration regions or irradiate them with a laser, giving those regions higher resistance than that of the source region and the drain region, as a substitute for reducing the impurity concentration in the low impurity concentration regions. The impurity concentration in the low impurity concentration regions may also be the same as that in the source region and the drain region.
By considering that the gettering region for capturing the crystallization promoting element, contacts the region to be gettered, has a size at which it is possible to capture the crystallization promoting element included in the region to be gettered, and reduces the number of processes, then it is necessary that it must be a region that includes at least the region that becomes the source region and the region that becomes the drain region. By doping a group 15 element such as phosphorus into a region that includes the region that becomes the source region and the region that becomes the drain region, the introduction of an impurity element for lowering resistance into the region that becomes the source region, and into the region that becomes the drain region, can be performed at the same time, and the impurity element introduction processing can be reduced.
Therefore, as shown in FIGS. 1A to 1D, in the present invention, a group 15 element is doped into regions 83, shown with dashed lines, which include at least regions 81 that become source regions, and regions 82 that become drain regions. Regions 81 and 82 contact regions to be gettered 80 that include regions that become channel forming regions, or the regions that become channel forming regions and regions that become low impurity concentration regions. The crystallization promoting element inside the regions to be gettered 80 is allowed to move to the gettering regions 83, in the direction indicated by arrows 85, and are captured, removing the crystallization promoting element from the regions to be gettered 80. The above are the main constituents of the present invention.
In FIG. 1A, the regions 81 that become the source regions and the regions 82 that become the drain regions are taken as the gettering regions 83, a group 15 element is doped, and removal of the crystallization promoting element in the regions to be gettered 80 is performed. In FIG. 1A, an area of the gettering regions 83 for capturing the crystallization promoting element is the minimum necessary, so that the concentration of the crystallization promoting element captured in the gettering regions 83 can be increased, and a reduction in resistance of the source regions 81 and the drain regions 82 can be obtained.
Phosphorus is doped in a belt shape manner as shown in FIG. 1B, and it is not necessary to align the positions of the phosphorus doping regions 83 with island-like semiconductor layers 86 in the horizontal direction (the belt length direction). In addition, the area of the gettering regions 83 in FIG. 1B is larger than that of FIG. 1A, so that the removal time for the crystallization promoting element can be shortened, and that the temperature can be lowered. At the same time, the belt widths of the phosphorus doping regions 83 in FIG. 1B are set to the widths of the source regions 81 and the drain regions 82, and the phosphorus doping regions 83 are made belt shape and their areas are the minimum required, so that out of all shapes that do not need to be aligned in the horizontal direction, the concentration of the crystallization promoting element captured in the source regions 81 and the drain regions 82 can be made its highest. And the resistance in the source regions 81 and the drain regions 82 can be lowered.
FIG. 1C shows, as in FIG. 1B, that phosphorus is doped in a belt shape manner, and the same effects as in FIG. 1B may be obtained. The widths of the phosphorus doping regions 83 are not the widths of the regions 81 that become the source region and the regions 82 that become the drain region, as in FIG. 1B. The widths of the phosphorus doping regions 83 are wider, so that the period of time to remove the crystallization promoting element can be made shorter than that of FIG. 1B, and that the temperature can be made lower. Further, in addition to the fact that it is unnecessary to align the phosphorus doping regions 83 and the island shaped semiconductor layers 86 in the horizontal direction (the belt length direction) because the widths of the belt shaped regions are wider than the widths of the regions that become the source regions and the widths of the regions that become the drain regions, it is also not necessary to strictly perform alignment in the vertical direction (the belt width direction) for the phosphorus doping regions 83 and the island-like semiconductor layers 86. Therefore, the reliability can be maximized with FIG. 1C.
FIG. 1D shows that phosphorus is doped around regions 84 that become the channel forming regions (or into the regions that become the channel forming regions and the low impurity concentration regions). The crystallization promoting element removal time can be minimized, and the temperature minimized.
The main constituents of the present invention, in order to solve the above stated problems, include: a process A of forming a semiconductor film; a process B of introducing an element that promotes crystallization into the semiconductor film; a process C of crystallizing the semiconductor film after introducing the element that promotes crystallization; a process D of selectively doping a group 15 element into the crystallized semiconductor film; a process E of performing heat treatment the semiconductor film after doping the group 15 element; and a process F of patterning the semiconductor film to form an island-like semiconductor layer, wherein the patterning is performed so that the region into which the group 15 element is doped becomes a source region and a drain region, and the region into which the group 15 element is not doped becomes a channel forming region.
In the above semiconductor film formation process A, the semiconductor film is a non-crystalline semiconductor film, or a semiconductor film having crystallinity, but with almost no crystal grains on the order of 100 nm or greater, and specifically this indicates an amorphous semiconductor film or a microcrystalline semiconductor film. A microcrystalline semiconductor film is a multi-phase semiconductor film of microcrystals, with a grain size of from several nanometers to several tens of nanometers, and non-crystallinity.
More specifically, the semiconductor film is an amorphous silicon film, a microcrystalline silicon film, an amorphous germanium film, a microcrystalline germanium film, or amorphous Si1Ge1xe2x88x92x (where 0 less than xc3x97 less than 1), and semiconductor films of these are deposited by chemical vapor deposition such as plasma CVD and reduced pressure CVD.
In addition, the semiconductor film and an inorganic insulating film may be deposited in succession when forming the semiconductor film. By doing so, impurities can be prevented from adhering to the surface of the semiconductor film. Further, the successively formed inorganic insulating film may be taken as a gate insulating film or a portion of a gate insulating film. Impurities at the interface of the semiconductor film and the gate insulating film are a cause of harm to the semiconductor characteristics, but if the semiconductor film and the gate insulator are deposited in succession, impurities can be prevented from adhering to the interface between the semiconductor film and the gate insulating film.
In the above introducing process B, the element that promotes crystallization (crystallization promoting element) is an element that has the function of promoting crystallization of a semiconductor, especially silicon. One or more elements selected from the following can be used as the crystallization promoting element: Ni; Fe; Co; Ru; Rh; Pd; Os; Ir; Pt; Cu; Au; and Ge.
A method of doping the crystallization promoting element into the semiconductor film, or a method of forming a film containing the crystallization promoting element on the upper surface or lower surface of the semiconductor film, can be used for a method of introducing the crystallization promoting element.
In the former method, after forming the semiconductor film, a method of doping the crystallization promoting element into the semiconductor film by ion injection or plasma doping can be used.
For the latter method, deposition techniques such as CVD, and sputtering, and coating techniques such as applying a solution that contains the crystallization promoting element by using a spinner, can be given for forming a film containing the crystallization promoting element. Further, when forming a film containing the crystallization promoting element, forming it either before or after the semiconductor film is good. If the semiconductor film is formed first, the film containing the crystallization promoting element is formed closely adhering to the upper surface of the semiconductor film. If the order of formation is reversed, the film containing the crystallization promoting element is formed closely adhering to the lower surface of the semiconductor film. Note that for the present invention, closely adhering does not always literally indicate that the semiconductor film and the crystallization promoting element are in close contact, but it includes compositions in which, if the crystallization promoting element can move within the semiconductor film, then an approximately 10 nm thick oxidized film, naturally oxidized film, etc., exist between the films.
For example, when nickel (Ni) is used as the crystallization promoting element in the introduction process, a Ni film or a Ni silicide film may be formed by a deposition technique.
Further, when using a coating technique, a solution can be used in which nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chlorinate, nickel iodide, nickel nitrate, or nickel sulfate, etc., is the solute, and in which water, alcohol, acid, or ammonia is the solvent. Or, a solution can be used in which nickel element is the solute, and benzene, toluene, xylene, carbon tetrachloride, chloroform, or ether is the solvent. In addition, a material like an emulsion in which nickel is dispersed throughout a medium, even if nickel is not completely dissolved, may be used.
Further, a method of forming an oxide film containing nickel in which either nickel or a nickel compound is dispersed in a solution used for forming an oxide film is acceptable. OCD (Ohka Diffusion Source), by Tokyo Ohka kogyo Co., Ltd., can be used as this type of solution. A silicon oxide film can be easily formed when OCD solution is used by applying it to the formation surface and then firing at approximately 200xc2x0 C. Other crystallization promoting element can be handled similarly.
The concentration of the crystallization promoting element in the semiconductor film can be most easily regulated with the coating technique as the crystallization promoting element introduction method, more so than by methods of depositing the film by doping or by sputtering a Ni film. The processing is also simplified.
The above crystallization process C is performed while the crystallization promoting element moves (diffuses) in the semiconductor film. If the semiconductor film in which the crystallization promoting element has been introduced is treated by heating, then the crystallization promoting element immediately diffuses within the semiconductor film. Then as the crystallization promoting element continues to diffuse, a catalytic action is produced in the amorphous state molecular chain, and the semiconductor film is crystallized.
The applicant of the present invention has disclosed information regarding the action that promotes crystallization in Japanese Patent Application Laid-open No. Hei 6-244103 and in Japanese Patent Application Laid-open No. Hei 6-244104. The silicon in contact with the crystallization promoting element combines with the crystallization promoting element, forming a silicide. It is understood that then the silicide and the amorphous state silicon compound react, and crystallization progresses. This is because the interatomic distance between the crystallization promoting element and the silicon is extremely close to the interatomic distance of single crystal silicon. The Ni-Si interatomic distance is the closest to the single crystal Si-Si interatomic distance, shorter by approximately 0.6%.
The following equation can be used to represent a model of the reaction that crystallizes the amorphous silicon film using Ni as the crystallization promoting element:
Si[a]xe2x88x92Ni (silicide)+Si[b]xe2x88x92Si[c](amorphous)xe2x86x92Si[a]xe2x88x92Si[b](crystalline)+Nixe2x88x92Si[c](silicide).
Note that in the above reaction equation, the indices [a], [b], and [c] represent Si atom locations.
The above reaction equation shows that Ni molecules in the silicide replace Si[b] atoms in the amorphous portion of the silicon, so that the Si[a]xe2x88x92Si[b] interatomic distance becomes almost the same as in a single crystal. In addition, it shows that Ni continues to diffuse within the semiconductor film, causing crystal growth. Further, it shows that at the time when the crystallization reaction is completed, Ni is in a compound state with Si and localizes at the final edge (or at the tip of the crystal growth). In short, Ni is in a irregular distribution within the film in a silicide state represented by NiSix after crystallization. The existence of this silicide can be confirmed as holes by FPM processing of the film after crystallization.
FPM processing is a process that uses FPM, (an etchant of 50% HF and 50% H2O2 mixed 1:1), which can remove nickel silicide in a short amount of time. The existence of nickel silicide can be verified by whether or not etching holes are caused after etching for 30 seconds with FPM.
Holes were generated by FPM irregularly in the crystallized silicon film by FPM processing. This shows that nickel localizes in crystallized regions, and that a silicide is formed from a combination with silicon in the portions where Ni localizes.
Note that it is understood that heating may be performed in a furnace at 450xc2x0 C. or above for imparting energy in order to advance the crystallization reaction. In addition, the upper limit of the heating temperature is 650xc2x0 C. This is so that the amorphous semiconductor film crystallization does not advance into the areas that do not react with the crystallization promoting element. If crystallization occurs in the areas that do not react with the crystallization promoting element, the crystal grains cannot become large because the crystallization promoting element cannot diffuse into those areas, and the grain size is also dispersed.
In addition, there are cases in which defects are included within the crystal grains in a semiconductor film crystallized by heat treatment, and there are also cases where amorphous areas remain. Then in order to crystallize those amorphous areas, and in order to eliminate defects within the grains, it is desirable to perform another heating process. The heating temperature is higher than during the crystallization heating process, specifically between 500 and 1,100xc2x0 C., more desirable between 600 and 1,100xc2x0 C. Note that the actual upper limit of the temperature is determined by the heat resistance of the substrate.
Note also that irradiation of excimer laser light can be substituted for heating in this process. However, as stated above, there is an unavoidable irradiation energy dispersion with an excimer laser, so that there is a fear that dispersions in crystallization of the amorphous areas will develop. Especially for cases in which there are dispersions, per film, in the distribution of amorphous areas, in one semiconductor device, not only will there be dispersions in characteristics between elements, but there is a fear that dispersions will develop in the characteristics between semiconductor devices.
For this reason it is desirable to always perform heat treatment after crystallization in cases where excimer laser light is irradiated, crystallizing amorphous areas and reducing defects. Therefore, it is important to perform heat treatment in order to improve crystallinity when using an excimer laser in the next photo annealing process.
In addition, RTA, in which infrared light that has peaks in a wavelength of 0.6 to 4 xcexcm, more desirable between 0.8 and 1.4 xcexcm, is irradiated for several tens to several hundreds of seconds, is known as a heating method similar to heat treatment in a furnace. The absorption coefficient for infrared light is high, so that the semiconductor film is heated to a temperature of from 800 to 1,100xc2x0 C. in a short time by irradiation of infrared light. However, the RTA irradiation time is longer than that of the excimer laser light, and heat is easily absorbed by the substrate, it is necessary to be careful of the generation of warping in cases where a glass substrate is used.
An object of the present invention is to remove (getter) the crystallization promoting element that localizes within the crystallized semiconductor film. A group 15 element is used in the present invention in order to getter the crystallization promoting element. In this case, the group 15 elements are P, As, N, Sb, and Bi. The element with the highest gettering ability is P, with Sb next.
To remove the crystallization promoting element in the present invention, a group 15 element is selectively doped into the crystallized crystalline semiconductor film, forming a region containing the group 15 element. Then heat treatment is performed, the crystallization promoting element moves in the region containing the group 15 element, and is captured. Vapor phase methods such as plasma doping and ion injection can be given for the process D in which a group 15 element is doped into the crystalline semiconductor film, the same as the method for introducing the crystallization promoting element into the semiconductor film.
The region in which the group 15 element is doped (the gettering region) either does not include the region that becomes a channel forming region of the crystallized semiconductor film, or does not include the regions that become the channel forming region and a low impurity concentration region. The region in which the group 15 element is doped does include the region which contacts the region that becomes the channel forming region, or does include the regions which contact the region that becomes the channel forming region and the region that becomes the low impurity concentration region. Specifically, the regions including the regions that become the source region and the drain region. By doping a group 15 element into the region that becomes the source region and into the region that becomes the drain region, the introduction process of an impurity element that gives low resistance can be performed at the same time. Therefore the processing can be simplified.
It is desirable to use an inorganic insulating film such as silicon oxide film, silicon nitride film, and oxidized silicon nitride film, as a mask when doping the group 15 element.
If the size of the region into which the group 15 element is doped (the gettering region) is at least as large as the region that becomes the source region and the region that becomes the drain region, then it is sufficiently large enough in order to remove the crystallization promoting element. However, if the group 15 element doped region is large, then the processing time can be shortened and the temperature reduced, which is desirable. Therefore, the processing performed to pattern the semiconductor film and to form an island-like semiconductor layer after removal of the crystallization promoting element, means that the group 15 element doped region can be larger than the source region and the drain region, which is desirable.
The group 15 element concentration in the region doped with the group 15 element is set at 10 times the concentration of the crystallization promoting element remaining within the semiconductor film. The crystallization promoting element remains on the order of 1018 to 1020 atoms/cm3 with the crystallization method of the present invention, so that the group 15 element concentration is set to 1019 to 1021 atoms/cm3.
The removal (gettering) of the crystallization promoting element is performed by the heating process E. The crystallization promoting element migrates to the group 15 element doped region (the gettering region) by heat treatment, and is captured (gettered). The crystallization promoting element removal process can be seen as a process in which crystallization promoting element is sucked into (gettered into) the group 15 element doped region.
The heat treatment is performed before formation of gate electrodes and gate wiring (the gate electrodes and the gate wiring are often formed as a unit). The temperature must be raised to its highest point of all manufacturing processes for the semiconductor device when the semiconductor film is crystallized and when the crystallization promoting element is removed. Therefore, by forming the gate electrodes after completion of these processes, a conductive material that is not highly heat resistant can be used for the gate electrodes. The property demanded of the gate electrode material when a semiconductor device is in use is low resistance, but the property of the gate electrode material demanded during manufacture of a semiconductor device is heat resistance. Heat resistance is an important property required so that reliability of the semiconductor device is not harmed. Conductive materials with low heat resistance have not been able to be used as gate electrode materials, no matter how low their electrical resistance, but by using the present invention conductive materials without high heat resistance can be used to form the gate electrodes.
In addition, with the present invention it is desirable to irradiate the crystallized crystalline semiconductor film with laser light or strong light before the crystallization promoting element removal process, in order to lower the temperature of the removal process and to reduce the processing time. The crystallization promoting element, which is localized in the crystalline semiconductor film, can be made into a state in which it is easily moved by light irradiation (photo annealing).
This is because the crystallization promoting element is distributed within the semiconductor film in a state like the NiSix bonded to semiconductor atoms, but the Nixe2x80x94Si bond is cut by the photo annealing energy, resulting in the crystallization promoting element returning to its atomic state. Or, this is because the Nixe2x80x94Si bond energy is lowered, so that the remaining crystallization promoting element reaches a state in which it can easily move within the crystalline semiconductor film.
The crystallization promoting element can be made to migrate by heating at 500xc2x0 C. or greater because the energy necessary to move the crystallization promoting element can be reduced by the above photo annealing, and the processing time can be shortened. In addition, the gettering region is formed in an element forming region, so that it is not necessary to newly form the gettering region, and the possible element forming area can be expanded. Note that the maximum heating temperature for the crystallization promoting element removal process is the temperature at which the group 15 element included in the gettering region will not migrate, from 800 to 850xc2x0 C.
Further, the portion irradiated by light in the photo annealing process may be the portion of the semiconductor film which becomes the semiconductor layer that constitutes the semiconductor elements, and at least includes the region (channel forming region) which forms the depletion layer of the semiconductor layer.
An excimer laser can be used as the light source used for photo annealing. For example, a KrF excimer laser (wavelength 248 nm), a XeCl excimer laser (wavelength 308 nm), a XeF excimer laser (wavelengths 351 and 353 nm), an ArF excimer laser (wavelength 193 nm), and a XeF excimer laser (wavelength 483 nm), etc., can be used. In addition, an ultraviolet lamp can be used, and an infrared lamp such as a xenon lamp or an arc lamp can be used. Pulse oscillator type excimer laser light can also be used.
The patterning in the island-like semiconductor layer forming process F is performed so that the region into which the group 15 element has been doped becomes the source region and the drain region, and so that the region into which the group 15 element is not doped becomes the channel forming region, or becomes the channel forming region and the low impurity concentration region.
Afterward, the gate electrodes are formed through a gate insulating film that is formed in contact with the semiconductor layer, and the semiconductor layers opposing the gate electrodes are taken as channel forming regions. The gate electrodes are formed, through the gate insulating film, on the region (region to be gettered) of the island-like semiconductor layer in which the group 15 element is not doped.
The source region and the gate region are not formed in a self-aligning manner matching the gate electrodes in the present invention. Therefore, by only changing the size of the gate electrodes, it is possible to make a structure in which the group 15 element doped region (the source region and the drain region) and the gate electrodes overlap, as seen from above, and it is possible to form the group 15 element doped region (the source region and the drain region) and the gate electrodes so that they almost touch, as seen from above. It is also possible to make a structure with a fixed distance gap between the group 15 element doped region (the source region and the drain region) and the gate electrodes, as seen from above.
Furthermore, after forming the group 15 element doped region (the source region and the drain region) and the gate electrodes with a gap of a fixed distance, in other words, after the gate electrodes are formed, through the gate insulating film, on a portion of the region into which the group 15 element is not doped (the region that becomes the channel forming region, out of the region that becomes the channel forming region and the low impurity concentration region), an impurity element can be doped using the gate electrodes as a mask, forming a low impurity concentration region between the source and drain regions, and the gate electrodes, as seen from above.
In addition, after forming the low impurity concentration region, a second conductive film is formed as a portion of the gate electrode on the first conductive film, previously formed as the gate electrode. Then, by patterning the second conductive film so that the low impurity concentration region and the second conductive film overlap, a gate overlapped LDD (GOLD) structure can be obtained, having a region in which the gate electrodes and the low impurity concentration region overlap. Degradation of a semiconductor device due to hot electron injection can be prevented with the GOLD structure. Additionally, a two layer gate electrode case is explained, but multi-layered structures with three or more layers may be used.
Thus by changing the size of the gate electrodes with the present invention, elements with differing structures can be manufactured. Therefore, different structures can easily be made on the same panel, for example a structure with matrix circuit and driver circuit elements. Similarly, an n-channel type TFT and a p-channel type TFT of the matrix circuit can easily be formed with differing structures.
It has been shown that by also doping a group 13 element, in addition to the group 15 element, into the region that captures the crystallization promoting element, the removal effect is better than that with the group 15 element alone. In this case the group 13 element concentration is from 1.3 to 2 times the concentration of the group 15 element. Group 13 elements are B, Al, Ga, In, and Ti.
A crystalline semiconductor region in which the crystallization promoting element concentration is reduced to below 5xc3x971017 atoms/cm3 (desirably below 2xc3x971017 atoms/cm3) can be obtained by the crystallization promoting element removal process of the present invention.
Note that, at present, the minimum detection limit for SIMS (secondary ion mass spectroscopy) is 2xc3x971017 atoms/cm3, so that it is not possible to investigate concentrations lower than that. However, it is estimated that the crystallization promoting element is reduced at least to between 1xc3x971014 and 1xc3x971015 atoms/cm3 by performing the removal process given in this specification.